View ZL40818_9044197.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 zarlink semiconductor inc. zarlink, zl and the zarlink semiconductor logo are trademarks of zarlink semiconductor inc. copyright 2003, zarlink semiconductor inc. all rights reserved. features ? very high operating speed low phase noise (typically better than -146dbc/hz at 10khz offset) 5v single supply operation low power dissipation: 500mw (typ) surface mount plastic package with exposed pad (see application notes) prescaler modulus zl40813 - divide by 8 zl40814 - divide by 16 ZL40818 - divide by 4 applications 10.5 to 13.5ghz pll applications lmds instrumentation satellite communications fibre optic communications; oc48, oc192 ultra low jitter clock systems description the zl40813, 14 and 18 are 5v supply, very high speed low power prescalers for professional applications with a fixed modulus of 8, 16, or 4 respectively. the dividing elements are dynamic d type flip flops and allow operation from 10.5ghz to 13.5ghz with a sinewave input (note these prescalers are not suitable for d.c. operation). the output stage has internal 50 ohm pull up giving a 1v p-p output. see application notes for more details. july 2003 ordering information zl40813/dce (tubes) 8 pin soic zl40813/dcf (tape and reel) 8 pin soic zl40814/dce (tubes) 8 pin soic zl40814/dcf (tape and reel) 8 pin soic ZL40818/dce (tubes) 8 pin soic ZL40818/dcf (tape and reel) 8 pin soic -40 c to +85 c zl40813/14/18 13.5ghz fixed modulus dividers data sheet figure 1 - functional block diagram vref div n 20ma 50 ohm 400 ohm vcc in vcc out output output b input input b gnd gnd 1 2 3 4 8 7 6 5
zl40813/14/18 data sheet 2 z arlink semiconductor inc. figure 2 - pin connections - top view 1.0 application configuration figure 3 shows a recommended application configuration. this example shows the devices set up for single-ended input and differential output operation. figure 3 - recommended circuit configuration. the above circuit diagram shows some components in dotted lines. these are optional in many applications. 1. c1 (10 f) and c2 (10 nf) power supply decoupling capacitors may be available on the board already. 2. r2 (100 ohm) and c8 (10 nf) can be included if further power supply decoupling is required for the first stage biasing circuit. this may optimise the noise and jitter performance. the values are suggestions and may have to be modified if the existing supplies are particularly noisy. 3. r1 (50 ohm), in series with c5 (100 pf), may reduce feedthrough of the input signal to the output. vcc input input input b gnd vcc output output output b gnd 1 2 3 4 5 6 7 8 soic (n) e-pad 1 2 3 4 8 7 6 5 r2:100 ohm r1:50 ohm c1:10uf c2:10nf c3:100pf c8:10nf c4:100pf c5:100pf c6:100pf c7:100pf rl:50 ohm
zl40813/14/18 data sheet 3 z arlink semiconductor inc. 2.0 evaluation boards from zarlink semiconductor zarlink semiconductor provides prescaler evaluation boards. these are primarily for those interested in performing their own assessment of the operation of the prescalers. the boards are supplied unpopulated and may be assembled for single ended or differential input and output operation, type no. zle40008. fully populated evaluation boards are also available, type no. zle40810. once assembled, all that is required is an rf source and a dc supply for operation. the inputs and outputs are connected via side launch sma connectors. ? these characteristics are guaranteed by either production test or design. ? pin 1 is the vcc pin for the 1 st stage bias current. in some applications e.g. if the power supply is noisy, it may be advantageous to add further supply decoupling to this pin (i.e. an additional r, c filter, see diagram of the recommended circuit configuration figure 3,). absolute maximum ratings parameter symbol min max units 1 supply voltage vcc 6.5 v 2 prescalar input voltage 2.5 (vdd_io+5%) vp-p 3 esd protection (static discharge) 2k v 4 storage temperature t st -65 +150 oc 5 maximum junction temp. t j max +125 oc 6 thermal characteristics th ja 58.6 oc/w multi-layer pcb ac/dc electrical characteristics (tamb = 25c, vcc = 5v) ? characteristic pin min. typ. max. units conditions supply current 1 0.35 ma input stage bias current ? supply current 8 58 93 130 ma zl40813 div8 supply current 8 61 96 134 ma zl40814 div16 supply current 8 61 100 134 ma ZL40818 div4
zl40813/14/18 data sheet 4 z arlink semiconductor inc. ? these characteristics are guaranteed by either production test or design. ? input sensitivity and output power values assume 50 ohm source and load impedances. ? the device characterisation test method incremented the amplitude over the entire range of frequency and ensures that there ar e no "holes" in the characteristic. for details of the test set-up, refer to the application note for rf prescalers. figure 4 - graph of input sensitivity @ +25 deg c input and output characteristics ? characteristic pin min. typ. max. units conditions input frequency 2,3 8.5 14.5 ghz rms sinewave ? input sensitivity 2,3 -2 2 dbm fin = 10.5ghz to 13.5ghz input overload 2,3 10 14 dbm fin = 10.5ghz to 13.5ghz output voltage 6,7 1 vp-p differential into 50ohm pullup resistors output power 6,7 -6 -1 dbm fin = 10.5ghz to 13.5ghz phase noise (10khz offset) 6,7 -140 dbc/hz fin = 10ghz, pwr ip = 0dbm see graphs, figure 7 to figure 9 o/p duty cycle 6,7 45 50 55 % differential output zl40814 typical i nput sensitivity (sinewave drive) @ +25degc -4 0.00 -3 0.00 -2 0.00 -1 0.00 0.00 10.00 20.00 8 9 10 11 12 13 14 15 16 frequency (ghz) vin i nto 50 ohm(dbm) guaranteed operating window
zl40813/14/18 data sheet 5 z arlink semiconductor inc. electrical characteristics (vcc = 5v 5%, tamb = -40 to +85c) the following characteristics are guaranteed by design and characterisation over the range of operating conditions unless otherwise stated: (input frequency range 9 to 13.5ghz rms sinewave) ? pin 1 is the vcc pin for the 1 st stage bias current. in some applications e.g. if the power supply is noisy, it may be advantageous to add further supply decoupling to this pin (i.e. an additional r, c filter, see diagram of the recommended circuit configuration, figure 9). for details of the test set-up, refer to the application note for rf prescalers. supply current table characteristic pin min. typ. max. units conditions supply current 1 0.35 ma input stage bias current ? supply current 8 51 93 144 ma zl40813 supply current 8 54 96 148 ma zl40814 supply current 8 54 100 148 ma ZL40818 input and output characteristics table input sensitivity and output power values assume 50 ohm source and load impedances characteristic pin min. typ. max. units conditions input sensitivity 2,3 -2 2 dbm fin = 10.5 to 12.5 ghz input sensitivity 2,3 10 14 dbm fin = 10.5 to 13.5 ghz output voltage 6,7 1 vp-p differential into 50ohm pullup resistors output power 6,7 -6 0 5 dbm single-ended output, fin = 9ghz to 13ghz, pwr ip= -10dbm . see graphs, figure 7 to figure 9. o/p duty cycle 6,7 45 50 55 % trise and tfall 6,7 110 ps
zl40813/14/18 data sheet 6 z arlink semiconductor inc. figure 5 - graph of input sensitivity @ -40, +25, +70 and +85 deg c. figure 6 - 13.5ghz prescalers; phase noise vs offset frequency zl40814 typical input sensitivity (sinewave drive) @ -40 to +85 degc -40.00 -30.00 -20.00 -10.00 0.00 10.00 20.00 8 9 10 11 12 13 14 15 16 input frequency (ghz) vin into 50 ohm (dbm) 25c -40c 85c max 70c guaranteed operating window 85 degc 70 degc 25 degc phase noise vs offset freq in = 10ghz pin = -1dbm, 5.25v, temp = 25c -150 -145 -140 -135 -130 -125 -120 0.1 1 10 100 offset frequency in khz phase noise in dbc/hz ZL40818 zl40813 zl40814
zl40813/14/18 data sheet 7 z arlink semiconductor inc. figure 7 - zl40813; phase noise vs offset frequency figure 8 - zl40814; phase noise vs offset frequency zl40813 phase noise vs offset pin = -1dbm, 5.25v, temp = 25c -150 -145 -140 -135 -130 -125 -120 0.1 1 10 100 offset frequency in khz phase noise in dbc/hz 10ghz 12ghz zl40814 phase noise vs offset pin = -1dbm, 5.25v, temp = 25c -150 -145 -140 -135 -130 -125 -120 0.1110100 offset frequency in khz phase noise in dbc/hz 13ghz 12ghz 10ghz
zl40813/14/18 data sheet 8 z arlink semiconductor inc. figure 9 - ZL40818; phase noise vs offset frequency 3.0 single ended output power. the following graphs show how the output power varies with supply. differential power will be 3db greater. figure 10 - zl40813 (div by 8) pout vs input frequency (vcc = 4.75v) ZL40818 phase noise vs offset pin = -1dbm, 5.25v, temp = 25c -150 -145 -140 -135 -130 -125 -120 0.1 1 10 100 offset frequency in khz phase noise in dbc/hz 10ghz 12ghz frequency_sweep , vcc = 4 .75v -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 8.0e +9 9.0 e+9 10.0e +9 11 .0e+ 9 12.0 e+ 9 13.0e+9 14.0 e+ 9 1 5.0e +9 16. 0e+9 i/p frequency (hz) o/p level (dbm) device 1,temperature = -40c device 1,tem perature = 2 5c device 1,temperature = 85c
zl40813/14/18 data sheet 9 z arlink semiconductor inc. figure 11 - zl40813 (div by 8) pout vs input frequency (vcc = 5.0v) figure 12 - zl40813 (div by 8) pout vs input frequency (vcc = 5.25v) frequency_sweep, vcc = 5v -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 8.0e +9 9.0 e+9 10.0e +9 11 .0e+ 9 12.0 e+ 9 13.0e+9 14.0 e+ 9 1 5.0e +9 16. 0e+9 i/p frequency (hz) o/p level (dbm) device 1,temperature = -40c device 1,tem perature = 2 5c device 1,temperature = 85c frequ ency_sweep , vcc = 5.25v -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 8.0e+9 9.0e+9 10.0e+9 11.0e+9 12.0e+9 13.0e+9 14.0e+9 15.0e+9 16.0e+9 i/p frequency (hz) o/p level (d bm) device 1,temperature = -40c device 1,temperature = 25c device 1,tem perature = 85c
zl40813/14/18 data sheet 10 z arlink semiconductor inc. figure 13 - ZL40818 (div by 4) pout vs input frequency (vcc = 4.75v) figure 14 - ZL40818 (div by 4) pout vs input frequency (vcc = 5.0v) frequency_sweep, vcc = 4.75v -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 8.0e+9 9.0e+9 10.0e+9 11.0e+9 12.0e+9 13.0e+9 14.0e+9 15.0e+9 16. 0e+9 i/p f requency (hz) o/p level (d bm) device 1,tem perature = -40 c device 1,tem peratu re = 2 5c d evice 1,tem perature = 85c frequency_sweep, vcc = 5v -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 8.0e +9 9.0 e+9 10.0e +9 11 .0e+ 9 12.0 e+ 9 13.0e+9 14.0 e+ 9 1 5.0e +9 16. 0e+9 i/p frequency (hz) o/p level (dbm) device 1,temperature = -40c device 1,tem perature = 2 5c device 1,temperature = 85c
zl40813/14/18 data sheet 11 z arlink semiconductor inc. figure 15 - ZL40818 (div by 4) pout vs input frequency (vcc = 5.25v) 4.0 oscillographs of the divider output waveforms the following oscillographs show that the low-level feedthrough of the input waveform can be further reduced by summing the two output pins of the device differentially, refer to figure 16 and figure 17. figure 16 - single-ended output waveform, showing some feedthrough of the input waveform. vcc=5v, vin=2dbm, fin=10ghz. frequency_sweep, vcc = 5.25v -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 8.0e+ 9 9. 0e+9 10.0e+ 9 11.0e+ 9 12. 0e+9 13. 0e+ 9 14 .0e +9 15 .0e+9 16.0e +9 i/p frequency (hz) o/ p l e ve l (d bm ) device 1,temperature = -40c device 1,temperature = 25c device 1,temperature = 85c
zl40813/14/18 data sheet 12 z arlink semiconductor inc. figure 17 - differential output waveform, showing reduced feedthrough of the input waveform vcc = 5v, vin = 2dbm, fin = 10ghz. 5.0 application notes 5.1 application circuit figure 3 illustrates the recommended single ended application circuit. this represents the circuit used to complete characterisation. the tabulated electrical performance is guaranteed using this application circuit. a blank application board is available. 5.1.1 circuit options the application circuit includes some optional components that may be required to improve tolerance of system noise present in the application. dummy r source may be added to the inverting input to provide a better matched source impedance at the input. this will improve the rejection of common mode noise present within the system. dummy r load may be added to the inverting output to provide better matched load at the output. this will reduce the radiated emi at the output and reduce the output noise present on the supply rail. rfilter can be inserted between the vcc in and the vcc_out to provide additional filtering to the input vcc. the input vcc powers the input bias reference only and can be a sensitive point to system noise. the nominal input current at vcc_in s 0.35ma. an alternative would be to use an inductive choke. c1 is additional supply filtering and should be added with rfilter. the ic includes 10pf of on chip supply filtering.
zl40813/14/18 data sheet 13 z arlink semiconductor inc. 5.2 single ended or differential load figure 16 and figure 17 illustrate the output waveform when measured differential and single ended with a 10ghz waveform at the input at a level of +2dbm. the single ended output contains some input frequency break through which contributes to the distortion present. this is a common mode signal which is rejected if the output is taken differentially. differential operation also provides an additional 3dbv output power. differential operation reduces the radiated emi in the system and reduces the susceptibility to common mode system noise. note : it is strongly recommended that these devices are used differentially for all applications.
c zarlink semiconductor 2003 all rights reserved. apprd. issue date acn package code previous package codes
www.zarlink.com information relating to products and services furnished herein by zarlink semiconductor inc. or its subsidiaries (collectively ?zarlink?) is believed to be reliable. however, zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from t he application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. neither the supply of such information or purchase of product or service conveys any license, either express or implied, u nder patents or other intellectual property rights owned by zarlink or licensed from third parties by zarlink, whatsoever. purchasers of products are also hereby notified that the use of product in certain ways or in combination with zarlink, or non-zarlink furnished goods or services may infringe patents or other intellect ual property rights owned by zarlink. this publication is issued to provide information only and (unless agreed by zarlink in writing) may not be used, applied or re produced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. the products, t heir specifications, services and other information appearing in this publication are subject to change by zarlink without notice. no warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is the user?s responsibility t o fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not b een superseded. manufacturing does not necessarily include testing of all functions or parameters. these products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. all products and materials are sold and services provided subject to zarlink?s conditi ons of sale which are available on request. purchase of zarlink?s i 2 c components conveys a licence under the philips i 2 c patent rights to use these components in and i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. zarlink, zl and the zarlink semiconductor logo are trademarks of zarlink semiconductor inc. copyright zarlink semiconductor inc. all rights reserved. technical documentation - not for resale for more information about all zarlink products visit our web site at

▲Up To Search▲

Price & Availability of ZL40818

	To Download ZL40818 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .